[DXC][DirectX][Intel] Incorrect `QuadAll` results for 2D compute quads

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Assessment

Difficulty
2/5
Estimated time
1-3 hours
Newbie friendliness
72/100
Issue type
Bug
Clarity
Clearly specified
Activity status
Active
Tech stack
c, cpp
Domain
testing-qa

Research direction

Start by locating the native cs_6_7 QuadAll test in the offload test suite and read its shader and expected output. Check how its 16 predicate patterns map to the two 2×2 quads for [numthreads(4, 2, 1)], then compare the result on the reported Intel Arc Pro B50 setup. Done means determining whether the observed masks contradict the HLSL quad mapping and recording a reproducible test result.

Written by the indexing model from the issue text.

Description

DXC’s native  cs_6_7  QuadAll test returns incorrect results on Intel Arc Pro B50 with Direct3D 12 and driver  32.0.101.9150 .

The shader uses  [numthreads(4, 2, 1)]  and tests all 16 predicate patterns. The HLSL specification requires two 2×2 quads per group.

Expected: Mask 15, lanes 0–3
Actual: Masks 12–15, lanes 2–3

The actual output matches grouping four consecutive  SV_GroupIndex  values into each quad instead of using 2×2  SV_GroupThreadID  blocks. This strongly suggests incorrect quad mapping in the Intel driver.

Dominant language
C++
Stars
20
Forks
41
Avg merge
5d 2h
Merged PRs (30d)
29

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