[Bug] [LLVM] FP16 asin, acos, asinh and acosh fail code generation as unknown intrinsics
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评估
调研方向
First run the supplied reproduction for each operator, then read src/target/intrin_rule.h, especially FloatSuffix and the DispatchPureExtern registrations. Trace how the LLVM pipeline lowers these FP16 calls, using the FP32 and explicit-promotion cases as controls. Done means direct FP16 calls to asin, acos, asinh, and acosh compile for LLVM and pass the supplied numerical checks.
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描述
Expected behavior
Accepted FP16 expressions for these floating-point operators should lower for LLVM, for example by promoting the calculation to FP32 and casting the result back to FP16. The explicit promotion in the script below compiles and produces the expected FP16 values.
Actual behavior
The default LLVM compilation pipeline leaves the FP16 call unlowered and fails in code generation:
unknown intrinsic ir.Op(... name="tirx.asinh" ...)
The same error occurs for tirx.asin, tirx.acos and tirx.acosh. Each direct FP16 case failed in three fresh Python processes. Both direct FP32 and explicit FP16-input/FP32-calculation/FP16-output controls compiled in three fresh processes per operator and checked three legal inputs per process against NumPy.
No custom schedule, disabled pass, or StmtSimplify ablation is required. Inputs for acosh are in [1.25, 4]; inputs for asin and acos are in [-0.75, 0.75], so these controls stay inside their mathematical domains.
The source registrations use DispatchPureExtern. FloatSuffix in src/target/intrin_rule.h selects function names for float32 and float64, and returns an empty name for float16. This appears to explain why the FP16 intrinsic reaches LLVM code generation without a supported lowering.
Environment
- Apache TVM 0.26.dev0+source.8f328e8 (source snapshot)
- Ubuntu 22.04.5, Linux 6.8.0-52-generic, x86-64
- Python 3.11.16, LLVM 15.0.7
- Target llvm; no GPU required
Steps to reproduce
Save as repro.py and run:
# Fails with an unknown tirx.asinh intrinsic:
python repro.py asinh
# Both compile and verify three inputs:
python repro.py asinh --promote
python repro.py asinh --dtype float32
# asin, acos and acosh reproduce with the same arguments.
import argparse
import numpy as np
import tvm
from tvm import te, tirx
p = argparse.ArgumentParser()
p.add_argument("op", choices=["asin", "acos", "asinh", "acosh"])
p.add_argument("--dtype", choices=["float16", "float32"], default="float16")
p.add_argument("--promote", action="store_true")
args = p.parse_args()
x = te.placeholder((8,), dtype=args.dtype, name="x")
op = getattr(tirx, args.op)
def compute(i):
value = x[i].astype("float32") if args.promote else x[i]
result = op(value)
return result.astype(args.dtype) if args.promote else result
y = te.compute((8,), compute, name="y")
mod = tvm.IRModule({"main": te.create_prim_func([x, y])})
executable = tvm.compile(mod, target="llvm")
for seed in [42, 9001, 20261103]:
rng = np.random.default_rng(seed)
lo, hi = (1.25, 4.0) if args.op == "acosh" else (-0.75, 0.75)
values = rng.uniform(lo, hi, (8,)).astype(args.dtype)
actual = tvm.runtime.empty((8,), args.dtype, tvm.cpu())
executable["main"](tvm.runtime.tensor(values, tvm.cpu()), actual)
expected = getattr(np, "arc" + args.op[1:])(
values.astype("float64")
).astype(args.dtype)
rtol, atol = (2e-3, 5e-4) if args.dtype == "float16" else (3e-6, 1e-7)
np.testing.assert_allclose(actual.numpy(), expected, rtol=rtol, atol=atol)
print("three legal inputs passed", flush=True)
Triage
- needs-triage
- type: bug
- 主要语言
- Python
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