[Feature] Support STM32F103C6 (32KB Flash, 10KB RAM) on stm32f103-blue-pill
维护者通常 1 天内回复
还没有人认领这个 Issue。
评估
- 难度
- 4/5
- 预计耗时
- 3-5 天
- 新手友好度
- 20/100
- Issue 类型
- 功能
- 描述清晰度
- 描述清楚
- 活跃度
- 停滞
- 技术栈
- c
- 领域
- embedded-iot
调研方向
The issue names bsp/stm32/stm32f103-blue-pill, including board.h, link.lds, rtconfig.py, board/Kconfig, README.md, and README_zh.md. Start by reviewing PR #11850, which the issue says already implements and verifies the proposed solution. Check its changes and validation against the C6 memory and peripheral constraints; the work is done when C6 builds fit its memory limits while the default C8 remains compatible.
由索引模型根据 Issue 内容生成。
描述
Affected area
Board Support Package (BSP)
Hardware/BSP vendor
STM32
Architecture
ARM / AArch64
Describe problem solved by the proposed feature
Currently, bsp/stm32/stm32f103-blue-pill only supports the STM32F103C8 chip (64KB/128KB Flash, 20KB RAM).
However, many widely available Blue Pill development boards on the market come populated with the lower-cost, pin-compatible STM32F103C6T6 (32KB Flash, 10KB RAM).
Attempting to run the existing BSP on an STM32F103C6 board causes several issues:
- Flash Overflow: The default firmware image exceeds 32KB, failing to fit or link for the C6 flash boundary.
- RAM Corruption:
board.hand the linker script assume 20KB SRAM (HEAP_ENDat0x20005000), whereas C6 has only 10KB SRAM (HEAP_ENDat0x20002800). Any heap allocation past 10KB causes silent memory corruption or HardFault. - Peripheral Differences: STM32F103C6 silicon physically lacks USART3 and SPI2.
Describe your preferred solution
Add support for the STM32F103C6 variant to bsp/stm32/stm32f103-blue-pill while keeping 100% backward compatibility for the default STM32F103C8:
-
Kconfig Chip Choice:
- Add a
choicebetweenSOC_STM32F103C8(default) andSOC_STM32F103C6. - When C6 is selected, automatically select
RT_USING_SMALL_MEM,RT_USING_SMALL_MEM_AS_HEAP, andRT_KLIBC_USING_LIBC_VSSCANF.
- Add a
-
Accurate Memory Boundaries (
board.h&link.lds):- Dynamically define
STM32_FLASH_SIZE(32KB) andSTM32_SRAM_SIZE(10KB) underSOC_STM32F103C6soHEAP_ENDis strictly bounded at0x20002800. - Update
link.ldswith dynamic_ROM_SIZEand_RAM_SIZEsymbols. - Pass
-Osand--defsym=_ROM_SIZE=32k,--defsym=_RAM_SIZE=10kinrtconfig.pyfor C6 builds.
- Dynamically define
-
Peripheral Constraints (
board/Kconfig):- Guard USART3, SPI2, and RTduino with
depends on !SOC_STM32F103C6. - Add
BSP_USING_SPI1option (supported on C6).
- Guard USART3, SPI2, and RTduino with
-
Flash Optimization Guide:
- Document optimization steps in
README.mdandREADME_zh.md(disabling serial DMA, FinSH symbol descriptions, and reducing shell stack to 2048) to fit standard RT-Thread with interactive FinSH (msh >) within 32KB.
- Document optimization steps in
Describe possible alternatives
I have already implemented and verified this solution in the PR #11850
- 主要语言
- C
- 星标
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- 平均合并
- 4 天 14 小时
- 30 天内合并 PR
- 25
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- 提交 Pull Request，并在描述里引用这个 Issue 编号。
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