using Vector capabilities of the CPU for sha256 in ssz merkelization of lists
@g11tech is already working on this.
Since Nov 22, 2021.
Assessment
This issue has not been assessed yet.
Description
In discussion with @potuz, it was discovered that there is scope for using capabilities of SIMD enabled processors, use case: ssz merkalization of the lists for which @potuz has reported 10x improvment.
goos: linux
goarch: amd64
cpu: AMD Ryzen 5 3600 6-Core Processor
BenchmarkHashBalanceShani-12 160 7629704 ns/op
BenchmarkHashBalanceShaniPrysm-12 15 74012328 ns/op
PASS
goos: linux
goarch: amd64
cpu: Intel(R) Core(TM) i5-3570 CPU @ 3.40GHz
BenchmarkHashBalanceAVX-4 68 26677965 ns/op
BenchmarkHashBalancePrysm-4 7 165434686 ns/op
PASS
goos: linux
goarch: amd64
cpu: Intel(R) Core(TM) i5-7200U CPU @ 2.50GHz
BenchmarkHashBalanceAVX2-4 121 9711482 ns/op
BenchmarkHashBalancePrysm-4 10 103716714 ns/op
PASS
Reference Links:
https://github.com/potuz/mammon/blob/main/ssz/sha256_avx2.asm#L635-L659
https://github.com/potuz/mammon/blob/main/ssz/hasher.hpp#L27
Based on this, digged through to realize that assembly script has support for SIMD vector processing: https://v8.dev/features/simd
There are two was this can be done:
- Via compiler flags for auto optimization of vector loops for single digest
- Via using assembly script wrapper functions to vectorize the computation for parallelizing multiple digest processings (the approach followed by @potuz in his reference implementation, more optimal wherever multi digest & SIMD compatible workload available)
Task:
- Investigate and get familiar SIMD support directives in assembly script
- Investigate and develop if possible, loop parallelization for SIMD
- Investigate and develop multiple digest feeds
- Integrate the multi digest support in ssz merkelization of lists
- Dominant language
- TypeScript
- Stars
- 62
- Forks
- 27
- Avg merge
- 19h 2m
- Merged PRs (30d)
- 6
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- Comment on the issue to say you are picking it up — it saves two people doing the same work.
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