Match Arrow totalOrder float comparison in the CUDA filter kernel and add NaN and -0.0 rows to conformance

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Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
44/100
Issue type
Bug
Clarity
Clearly specified
Activity status
Active
Tech stack
rust
Domain
backend, databases

Research direction

Read the CPU comparison in crates/oxidelake-device/src/cpu/kernels.rs:82-88 and the CUDA filter in crates/oxidelake-device/kernels/cuda/filter_project.cu:57-62, then inspect the conformance fixtures in crates/oxidelake-compute/tests/conformance.rs:41-43. Add rows covering NaN, signed zero, and infinities, and check Float64 MIN/MAX against DataFusion; done means CPU, Metal, and CUDA conformance passes with matching semantics.

Written by the indexing model from the issue text.

Description

bug

Today — the CPU reference compares Float64 with Arrow's cmp::eq/lt/… (crates/oxidelake-device/src/cpu/kernels.rs:82-88), which Arrow documents as IEEE 754 totalOrder ("treats positive and negative zeros as different", arrow-ord-58.4.0/src/cmp.rs:72-75; is_eq is total_cmp(..).is_eq()). The CUDA kernel is plain IEEE arithmetic:

// crates/oxidelake-device/kernels/cuda/filter_project.cu:57-62
case 0: r = v == literal; break;
case 1: r = v <  literal; break;

So for a Float64 column: v > 4.0 is true for NaN on CPU/DataFusion (NaN is greatest in total order) and false on CUDA; v = 0.0 on a -0.0 value is false on CPU and true on CUDA. The conformance fixtures cannot see it: v is f64::from(rng.random_range(0..40)) / 4.0 (crates/oxidelake-compute/tests/conformance.rs:41-43) and datagen's v is u32 % 100 / 4.0 — no NaN, no negative zero, no infinities.

Why it is worth fixing — a GPU-planned filter silently returns different rows from the CPU reference on real float data (NaN is common in analytics). This is exactly the divergence ADR-0012's conformance suite exists to catch, and it is invisible to it today.

Fix — implement total order on device by comparing sign-adjusted bit patterns (__double_as_longlong, flip the low bits for negatives) in filter_project.cu; Metal is Int64-only and unaffected. Add NaN, -0.0, +0.0, ±inf rows to gen_left/gen_right and to oxide gen-data (behind a flag) so every backend is pinned. Also check MIN/MAX(Float64) in cpu/kernels.rs:401-402 (f64::min/max) against DataFusion's stock semantics for NaN — same fixture gap.

Done when — conformance on CPU, Metal and CUDA (the latter in the on-demand GPU job) passes with the new rows; the CPU reference and stock DataFusion agree on MIN/MAX with NaN present.

Dominant language
Rust
Stars
1
Forks
2
Avg merge
1d 11h
Merged PRs (30d)
7

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