[Design] Improve proto wire size for serialized circuits

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Assessment

Difficulty
5/5
Estimated time
Over a week
Newbie friendliness
25/100
Issue type
Refactor
Clarity
Mostly clear
Activity status
Stale
Tech stack
cpp, python
Domain
performance

Research direction

Start by reviewing the serialization changes from #590, then inspect op_serializer.py, program.proto, and the related Python and C++ serialization code. Profile serialization and deserialization for small simulations, define the revised proto design and its wire-size and timing goals, and implement the changes across both languages.

Written by the indexing model from the issue text.

Description

area/circuits area/performance kind/feature-request

Thanks to #590 we can now roll our own proto structures + serialization code. We should do some work to try and make our program.proto wire size and serialization code (python and C++) as fast as possible. Anecdotally I can say that in smaller simulation workloads ( < 10 qubits ) The lions share of the time in C++ is actually spent deserializing, this shouldn't be the case.

Some good steps for this project would be to:

  1. Slim down the code in op_serializer.py and other modules as much as possible so that we have the bare minimum needed for our functionality. i.e. we don't allow boolean types in our serialization.

  2. Draft a new proto design spec for program.proto with an eye for fast serialization time and small wire size.

  3. Gradually implement that new spec which would require steady changes in both python and C++ code.

Dominant language
Python
Stars
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Forks
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Avg merge
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Merged PRs (30d)
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  4. Open a pull request that references the issue number.

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