Pi 5: NVMe behind PCIe switch port lost since 6.18.39 / 6.12.96 – Target Speed quirk lifts a working 2.5GT/s clamp (72780f796468)

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Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
45/100
Issue type
Bug
Clarity
Mostly clear
Activity status
Active
Tech stack
c
Domain
embedded-iot, operating-systems

Research direction

Start with the PCI Target Speed quirk and upstream commit 72780f796468, then compare the 6.12.75 and 6.18.50 dmesg sequences for port 0001:02:07.0. Review the linked linux-pci discussion, reproduce on the listed kernels, and verify that the NVMe remains available at 2.5GT/s without failed retraining or the added boot delay.

Written by the indexing model from the issue text.

Description

Describe the bug

On a Pi 5 with a Geekworm X1005 dual-M.2 board (ASMedia ASM1182e Gen2 packet switch), the NVMe SSD behind one switch downstream port (0001:02:07.0) disappears on every kernel that carries the stable backport of upstream commit 72780f796468 ("PCI: Always lift 2.5GT/s restriction in PCIe failed link retraining"). Kernels without it work.

Tested on the same hardware, same EEPROM, same SD card, only the kernel swapped (all apt kernels, Trixie):

Kernel 72780f796468 backport Port 7 result
6.12.34, 6.12.47, 6.12.75 no link up at 2.5GT/s, SSD present (every boot since Aug 2025)
6.18.39 yes no link, SSD missing
6.18.50 (current) yes no link, SSD missing (log below)

Swapping the two SSDs moves the failure with the port, not with the drive.

What happens. Port 7 does not train at 5GT/s on this board, it never has. On 6.12 the Target Speed quirk clamps it to 2.5GT/s and the link comes up at Gen1. On 6.18.50 the quirk clamps it, the link comes up, and 20 ms later the clamp is lifted unconditionally (LnkCap says 5GT/s). The 5GT/s retrain fails, and the error path restores the original 5GT/s target, so the port ends up with no link at all. As a side effect, the two 1 s retrain timeouts add ~2 s to every boot.

6.18.50:

[    0.518303] pci 0001:02:07.0: broken device, retraining non-functional downstream link at 2.5GT/s
[    0.538795] pci 0001:02:07.0: removing 2.5GT/s downstream link speed restriction
[    1.537936] pci 0001:02:07.0: retraining failed
[    2.537975] pci 0001:02:07.0: PME# supported from D0 D3hot D3cold

0001:02:07.0  LnkSta: Speed 5GT/s, Width x1   TrErr- Train+ SlotClk+ DLActive- BWMgmt+
              LnkCtl2: Target Link Speed: 5GT/s

6.12.75:

[    2.089879] pci 0001:02:07.0: broken device, retraining non-functional downstream link at 2.5GT/s
[    2.201770] pci 0001:04:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0001:02:07.0 ...

0001:02:07.0  LnkSta: Speed 2.5GT/s, Width x1   TrErr- Train+ SlotClk+ DLActive+ BWMgmt-
              LnkCtl2: Target Link Speed: 2.5GT/s

This matches the code: before 72780f796468 the clamp was only lifted for the ASM2824 and only with the link up; since then it is lifted for every downstream port whose LnkCap exceeds 2.5GT/s, and a failed lift is not reverted to the working 2.5GT/s clamp.

Upstream, the regression from 72780f796468 is discussed on linux-pci in the thread for "[PATCH v3] PCI: Skip Target Speed quirk on clamped ports with no link". As far as I can read it, v3 only covers ports that are already clamped on entry with no link (empty slots). It does not change this case (device present, quirk clamps successfully, then lifts the clamp again). I'll post this data point there too.

Hardware caveat, for completeness. Port 7 is clearly the weaker signal path on this board. Under 6.12.75 its AER status shows correctable errors (CESta: RxErr+ BadTLP+ BadDLLP+, DevSta: CorrErr+), port 3 shows none. The errors are not just a leftover of the failed 5GT/s training: after clearing CESta/DevSta, RxErr+ is set again immediately, and a sequential read of 8 GiB (O_DIRECT) from the SSD behind port 7 adds BadTLP+ and BadDLLP+. So the Gen1 link is marginal, but the replays are absorbed by the link layer: the read ran at 222 MB/s (close to the Gen1 x1 limit) and ZFS reports zero checksum errors. Still, the port has been fully functional at 2.5GT/s for over a year with a ZFS mirror on top. Since 6.12.96 / 6.18.39 it is lost entirely.

Ruled out along the way:

  • Device tree: node /axi/pcie@1000110000 is byte-identical in the 6.12.75 and 6.18.39 packages (max-link-speed = <2>, brcm,clkreq-mode = "safe").
  • Resources/hotplug: bus 04 is assigned, no BAR/window failures, SltCap: HotPlug- on both downstream ports.
  • EEPROM: failure and recovery reproduced with the same bootloader build.
  • pcie-brcmstb.c is unchanged on rpi-6.18.y since 2026-05-29.
Steps to reproduce the behaviour
  1. Pi 5 + PCIe switch board with one downstream port that fails to train at 5GT/s. You can spot such a port on any 6.12 kernel before 6.12.96 via dmesg | grep 'retraining non-functional'.
  2. Boot a kernel without the backport (e.g. 6.12.75+rpt-rpi-2712): the device behind the port is present at 2.5GT/s.
  3. Boot 6.18.50+rpt-rpi-2712 (or 6.18.39+, 6.12.96+): the quirk logs removing 2.5GT/s downstream link speed restriction followed by retraining failed, and the device is gone.
Device (s)

Raspberry Pi 5

System
  • Raspberry Pi 5 8 GB, Raspberry Pi OS Trixie (arm64), root on SD card
  • Bootloader EEPROM 2026/09/10 (version 465206a286cc1a7b13c2e86bc199f74dde7a8309)
  • Kernels: 6.12.75+rpt-rpi-2712 (good), 6.18.50+rpt-rpi-2712 (bad)
  • Geekworm X1005, ASMedia ASM1182e [1b21:1182], subsystem [1b21:118f]
  • 2 × WD Blue SN5000 4 TB [15b7:504a] (DRAM-less), ZFS mirror
Logs
6.18.50: dmesg (PCIe/NVMe) 
[    0.000000] Kernel command line: reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe cgroup_disable=memory numa_policy=interleave nvme.max_host_mem_size_mb=32  numa=fake=8 system_heap.max_order=0 iommu_dma_numa_policy=interleave smsc95xx.macaddr=<mac> vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000  console=ttyAMA10,115200 console=tty1 root=PARTUUID=31c71ca1-02 rootfstype=ext4 fsck.repair=yes rootwait cfg80211.ieee80211_regdom=DE
[    0.399563] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@1000110000 ranges:
[    0.399581] brcm-pcie 1000110000.pcie:      MEM 0x1b80000000..0x1bffffffff -> 0x0080000000
[    0.399589] brcm-pcie 1000110000.pcie:      MEM 0x1800000000..0x1b7fffffff -> 0x0400000000
[    0.399599] brcm-pcie 1000110000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    0.399607] brcm-pcie 1000110000.pcie:   IB MEM 0x1000131000..0x1000131fff -> 0xfffffff000
[    0.400933] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0001:00
[    0.400959] pci 0001:00:00.0: [14e4:2712] type 01 class 0x060400 PCIe Root Port
[    0.400966] pci 0001:00:00.0: PCI bridge to [bus 00]
[    0.400970] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    0.400974] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    0.400991] pci 0001:00:00.0: PME# supported from D0 D3hot
[    0.401550] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.505937] brcm-pcie 1000110000.pcie: clkreq-mode set to safe
[    0.505941] brcm-pcie 1000110000.pcie: link up, 5.0 GT/s PCIe x1 (!SSC)
[    0.505967] pci 0001:01:00.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Upstream Port
[    0.505991] pci 0001:01:00.0: PCI bridge to [bus 00]
[    0.505998] pci 0001:01:00.0:   bridge window [io  0x0000-0x0fff]
[    0.506003] pci 0001:01:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    0.506014] pci 0001:01:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    0.506027] pci 0001:01:00.0: enabling Extended Tags
[    0.506082] pci 0001:01:00.0: PME# supported from D0 D3hot D3cold
[    0.517826] pci 0001:01:00.0: ASPM: default states L1
[    0.517833] pci 0001:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.517967] pci 0001:02:03.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Downstream Port
[    0.517991] pci 0001:02:03.0: PCI bridge to [bus 00]
[    0.517998] pci 0001:02:03.0:   bridge window [io  0x0000-0x0fff]
[    0.518003] pci 0001:02:03.0:   bridge window [mem 0x00000000-0x000fffff]
[    0.518013] pci 0001:02:03.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    0.518028] pci 0001:02:03.0: enabling Extended Tags
[    0.518083] pci 0001:02:03.0: PME# supported from D0 D3hot D3cold
[    0.518229] pci 0001:02:07.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Downstream Port
[    0.518253] pci 0001:02:07.0: PCI bridge to [bus 00]
[    0.518260] pci 0001:02:07.0:   bridge window [io  0x0000-0x0fff]
[    0.518264] pci 0001:02:07.0:   bridge window [mem 0x00000000-0x000fffff]
[    0.518275] pci 0001:02:07.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    0.518290] pci 0001:02:07.0: enabling Extended Tags
[    0.518303] pci 0001:02:07.0: broken device, retraining non-functional downstream link at 2.5GT/s
[    0.538795] pci 0001:02:07.0: removing 2.5GT/s downstream link speed restriction
[    1.537936] pci 0001:02:07.0: retraining failed
[    2.537975] pci 0001:02:07.0: PME# supported from D0 D3hot D3cold
[    2.538481] pci 0001:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.538491] pci 0001:02:07.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.538568] pci 0001:03:00.0: [15b7:504a] type 00 class 0x010802 PCIe Endpoint
[    2.538627] pci 0001:03:00.0: BAR 0 [mem 0x00000000-0x00003fff 64bit]
[    2.538810] pci 0001:03:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x1 link at 0001:00:00.0 (capable of 63.012 Gb/s with 16.0 GT/s PCIe x4 link)
[    2.545942] pci 0001:03:00.0: ASPM: default states L1
[    2.835399] pci 0001:00:00.0: bridge window [mem 0x1b80000000-0x1b800fffff]: assigned
[    2.835404] pci 0001:01:00.0: bridge window [mem 0x1b80000000-0x1b800fffff]: assigned
[    2.835408] pci 0001:02:03.0: bridge window [mem 0x1b80000000-0x1b800fffff]: assigned
[    2.835412] pci 0001:03:00.0: BAR 0 [mem 0x1b80000000-0x1b80003fff 64bit]: assigned
[    2.835425] pci 0001:02:03.0: PCI bridge to [bus 03]
[    2.835430] pci 0001:02:03.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    2.835438] pci 0001:02:07.0: PCI bridge to [bus 04]
[    2.835447] pci 0001:01:00.0: PCI bridge to [bus 02-04]
[    2.835452] pci 0001:01:00.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    2.835459] pci 0001:00:00.0: PCI bridge to [bus 01-04]
[    2.835462] pci 0001:00:00.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    2.835482] pci 0001:00:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    2.835489] pci 0001:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.835497] pci 0001:02:03.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.835508] pci 0001:03:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    2.835515] pci 0001:02:07.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.835645] pcieport 0001:00:00.0: enabling device (0000 -> 0002)
[    2.835677] pcieport 0001:00:00.0: PME: Signaling with IRQ 37
[    2.835716] pcieport 0001:00:00.0: AER: enabled with IRQ 37
[    2.835835] pcieport 0001:01:00.0: enabling device (0000 -> 0002)
[    2.835969] pcieport 0001:02:03.0: enabling device (0000 -> 0002)
[    2.836471] nvme nvme0: pci function 0001:03:00.0
[    2.836492] nvme 0001:03:00.0: enabling device (0000 -> 0002)
[    2.843623] nvme nvme0: allocated 32 MiB host memory buffer (1 segment).
[    2.879986] nvme nvme0: 4/0/0 default/read/poll queues
[    2.886878]  nvme0n1: p1 p2 p3 p4
[   11.801568] systemd[1]: Starting modprobe@nvme_fabrics.service - Load Kernel Module nvme_fabrics...
[   12.012170] systemd[1]: modprobe@nvme_fabrics.service: Deactivated successfully.
[   12.012259] systemd[1]: Finished modprobe@nvme_fabrics.service - Load Kernel Module nvme_fabrics.
[   19.811434] nvme nvme0: using unchecked data buffer
6.12.75: dmesg (PCIe/NVMe) 
[    0.000000] Kernel command line: reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe cgroup_disable=memory numa_policy=interleave nvme.max_host_mem_size_mb=0  numa=fake=8 system_heap.max_order=0 iommu_dma_numa_policy=interleave smsc95xx.macaddr=<mac> vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000  console=ttyAMA10,115200 console=tty1 root=PARTUUID=31c71ca1-02 rootfstype=ext4 fsck.repair=yes rootwait cfg80211.ieee80211_regdom=DE
[    1.819799] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@1000110000 ranges:
[    1.827153] brcm-pcie 1000110000.pcie:   No bus range found for /axi/pcie@1000110000, using [bus 00-ff]
[    1.836599] brcm-pcie 1000110000.pcie:      MEM 0x1b80000000..0x1bffffffff -> 0x0080000000
[    1.844903] brcm-pcie 1000110000.pcie:      MEM 0x1800000000..0x1b7fffffff -> 0x0400000000
[    1.853209] brcm-pcie 1000110000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    1.861511] brcm-pcie 1000110000.pcie:   IB MEM 0x1000131000..0x1000131fff -> 0xfffffff000
[    1.871145] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0001:00
[    1.904911] pci 0001:00:00.0: [14e4:2712] type 01 class 0x060400 PCIe Root Port
[    1.912257] pci 0001:00:00.0: PCI bridge to [bus 00]
[    1.917240] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    1.924058] pci 0001:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    1.931848] pci 0001:00:00.0: PME# supported from D0 D3hot
[    1.937921] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.049137] brcm-pcie 1000110000.pcie: clkreq-mode set to safe
[    2.054991] brcm-pcie 1000110000.pcie: link up, 5.0 GT/s PCIe x1 (!SSC)
[    2.061650] pci 0001:01:00.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Upstream Port
[    2.069968] pci 0001:01:00.0: PCI bridge to [bus 00]
[    2.074953] pci 0001:01:00.0:   bridge window [io  0x0000-0x0fff]
[    2.081071] pci 0001:01:00.0:   bridge window [mem 0x00000000-0x000fffff]
[    2.087892] pci 0001:01:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    2.095677] pci 0001:01:00.0: enabling Extended Tags
[    2.100705] pci 0001:01:00.0: PME# supported from D0 D3hot D3cold
[    2.113143] pci 0001:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.121306] pci 0001:02:03.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Downstream Port
[    2.129801] pci 0001:02:03.0: PCI bridge to [bus 00]
[    2.134791] pci 0001:02:03.0:   bridge window [io  0x0000-0x0fff]
[    2.140919] pci 0001:02:03.0:   bridge window [mem 0x00000000-0x000fffff]
[    2.147742] pci 0001:02:03.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    2.155529] pci 0001:02:03.0: enabling Extended Tags
[    2.160558] pci 0001:02:03.0: PME# supported from D0 D3hot D3cold
[    2.166841] pci 0001:02:07.0: [1b21:1182] type 01 class 0x060400 PCIe Switch Downstream Port
[    2.175340] pci 0001:02:07.0: PCI bridge to [bus 00]
[    2.180325] pci 0001:02:07.0:   bridge window [io  0x0000-0x0fff]
[    2.186445] pci 0001:02:07.0:   bridge window [mem 0x00000000-0x000fffff]
[    2.193268] pci 0001:02:07.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
[    2.201053] pci 0001:02:07.0: enabling Extended Tags
[    2.206048] pci 0001:02:07.0: broken device, retraining non-functional downstream link at 2.5GT/s
[    2.229180] pci 0001:02:07.0: PME# supported from D0 D3hot D3cold
[    2.235767] pci 0001:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.243819] pci 0001:02:07.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.251931] pci 0001:03:00.0: [15b7:504a] type 00 class 0x010802 PCIe Endpoint
[    2.259205] pci 0001:03:00.0: BAR 0 [mem 0x00000000-0x00003fff 64bit]
[    2.265863] pci 0001:03:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x1 link at 0001:00:00.0 (capable of 63.012 Gb/s with 16.0 GT/s PCIe x4 link)
[    2.291867] pci 0001:04:00.0: [15b7:504a] type 00 class 0x010802 PCIe Endpoint
[    2.299153] pci 0001:04:00.0: BAR 0 [mem 0x00000000-0x00003fff 64bit]
[    2.305890] pci 0001:04:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0001:02:07.0 (capable of 63.012 Gb/s with 16.0 GT/s PCIe x4 link)
[    2.349094] pci 0001:00:00.0: bridge window [mem 0x1b80000000-0x1b801fffff]: assigned
[    2.356961] pci 0001:01:00.0: bridge window [mem 0x1b80000000-0x1b801fffff]: assigned
[    2.364827] pci 0001:02:03.0: bridge window [mem 0x1b80000000-0x1b800fffff]: assigned
[    2.372692] pci 0001:02:07.0: bridge window [mem 0x1b80100000-0x1b801fffff]: assigned
[    2.380561] pci 0001:03:00.0: BAR 0 [mem 0x1b80000000-0x1b80003fff 64bit]: assigned
[    2.388266] pci 0001:02:03.0: PCI bridge to [bus 03]
[    2.393251] pci 0001:02:03.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    2.400419] pci 0001:04:00.0: BAR 0 [mem 0x1b80100000-0x1b80103fff 64bit]: assigned
[    2.408120] pci 0001:02:07.0: PCI bridge to [bus 04]
[    2.413103] pci 0001:02:07.0:   bridge window [mem 0x1b80100000-0x1b801fffff]
[    2.420272] pci 0001:01:00.0: PCI bridge to [bus 02-04]
[    2.425517] pci 0001:01:00.0:   bridge window [mem 0x1b80000000-0x1b801fffff]
[    2.432687] pci 0001:00:00.0: PCI bridge to [bus 01-04]
[    2.437929] pci 0001:00:00.0:   bridge window [mem 0x1b80000000-0x1b801fffff]
[    2.485368] pci 0001:00:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    2.493846] pci 0001:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.502332] pci 0001:02:03.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.510814] pci 0001:03:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    2.519293] pci 0001:02:07.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    2.527777] pci 0001:04:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    2.536311] pcieport 0001:00:00.0: enabling device (0000 -> 0002)
[    2.542454] pcieport 0001:00:00.0: PME: Signaling with IRQ 38
[    2.548267] pcieport 0001:00:00.0: AER: enabled with IRQ 38
[    2.553947] pcieport 0001:01:00.0: enabling device (0000 -> 0002)
[    2.560182] pcieport 0001:02:03.0: enabling device (0000 -> 0002)
[    2.566461] pcieport 0001:02:07.0: enabling device (0000 -> 0002)
[    2.572833] nvme nvme0: pci function 0001:03:00.0
[    2.577574] nvme 0001:03:00.0: enabling device (0000 -> 0002)
[    2.609620] nvme nvme0: min host memory (3 MiB) above limit (0 MiB).
[    2.617641] nvme nvme0: 4/0/0 default/read/poll queues
[    2.627073]  nvme0n1: p1 p2 p3 p4
[    2.630794] nvme nvme1: pci function 0001:04:00.0
[    2.635541] nvme 0001:04:00.0: enabling device (0000 -> 0002)
[    2.667564] nvme nvme1: min host memory (3 MiB) above limit (0 MiB).
[    2.675333] nvme nvme1: 1/0/0 default/read/poll queues
[    2.684225]  nvme1n1: p1 p2 p3 p4
[   11.892293] systemd[1]: Starting modprobe@nvme_fabrics.service - Load Kernel Module nvme_fabrics...
[   12.189123] systemd[1]: modprobe@nvme_fabrics.service: Deactivated successfully.
[   12.197165] systemd[1]: Finished modprobe@nvme_fabrics.service - Load Kernel Module nvme_fabrics.
[   19.767635] nvme nvme0: using unchecked data buffer
lspci -vv of both switch downstream ports, 6.18.50 vs 6.12.75 
=== 6.18.50  0001:02:03.0
	Capabilities: [80] Express (v2) Downstream Port (Slot+), IntMsgNum 0
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag+ RBE+ TEE-IO-
		DevCtl:	CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 256 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
		LnkCap:	Port #3, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <2us, L1 unlimited
			ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
		LnkCtl:	ASPM L1 Enabled; LnkDisable- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
		LnkSta:	Speed 5GT/s, Width x1
			TrErr- Train+ SlotClk+ DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #3, PowerLimit 26W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
			 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
			 FRS- ARIFwd-
			 AtomicOpsCap: Routing-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
			 AtomicOpsCtl: EgressBlck-
			 IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
			 Retimer- 2Retimers- CrosslinkRes: unsupported
	Capabilities: [200 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr- HeaderOF-
		AERCap:	First Error Pointer: 1f, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
			MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
		HeaderLog: 00000000 00000000 00000000 00000000
=== 6.18.50  0001:02:07.0
	Capabilities: [80] Express (v2) Downstream Port (Slot+), IntMsgNum 0
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag+ RBE+ TEE-IO-
		DevCtl:	CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 256 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
		LnkCap:	Port #7, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 unlimited
			ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
		LnkCtl:	ASPM Disabled; LnkDisable- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+
		LnkSta:	Speed 5GT/s, Width x1
			TrErr- Train+ SlotClk+ DLActive- BWMgmt+ ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #7, PowerLimit 26W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
			 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
			 FRS- ARIFwd-
			 AtomicOpsCap: Routing-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
			 AtomicOpsCtl: EgressBlck-
			 IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
			 Retimer- 2Retimers- CrosslinkRes: unsupported
	Capabilities: [200 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr- HeaderOF-
		AERCap:	First Error Pointer: 1f, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
			MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
		HeaderLog: 00000000 00000000 00000000 00000000
=== 6.12.75  0001:02:03.0
	Capabilities: [80] Express (v2) Downstream Port (Slot+), IntMsgNum 0
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag+ RBE+ TEE-IO-
		DevCtl:	CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 256 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
		LnkCap:	Port #3, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <2us, L1 unlimited
			ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
		LnkCtl:	ASPM L1 Enabled; LnkDisable- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x1
			TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #3, PowerLimit 26W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
			 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
			 FRS- ARIFwd-
			 AtomicOpsCap: Routing-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
			 AtomicOpsCtl: EgressBlck-
			 IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
			 Retimer- 2Retimers- CrosslinkRes: unsupported
	Capabilities: [200 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr- HeaderOF-
		AERCap:	First Error Pointer: 1f, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
			MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
		HeaderLog: 00000000 00000000 00000000 00000000
=== 6.12.75  0001:02:07.0
	Capabilities: [80] Express (v2) Downstream Port (Slot+), IntMsgNum 0
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag+ RBE+ TEE-IO-
		DevCtl:	CorrErr+ NonFatalErr+ FatalErr+ UnsupReq+
			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 256 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr+ NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
		LnkCap:	Port #7, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <2us, L1 unlimited
			ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
		LnkCtl:	ASPM L1 Enabled; LnkDisable- CommClk+
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x1
			TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
		SltCap:	AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
			Slot #7, PowerLimit 26W; Interlock- NoCompl-
		SltCtl:	Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
			Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
		SltSta:	Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
			Changed: MRL- PresDet- LinkState+
		DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
			 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
			 FRS- ARIFwd-
			 AtomicOpsCap: Routing-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-
			 AtomicOpsCtl: EgressBlck-
			 IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
		LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
		LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete- EqualizationPhase1-
			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
			 Retimer- 2Retimers- CrosslinkRes: unsupported
	Capabilities: [200 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP-
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+
			ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- AtomicOpBlocked- TLPBlockedErr-
			PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- PCRC_CHECK- TLPXlatBlocked-
		CESta:	RxErr+ BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr- CorrIntErr- HeaderOF-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+ CorrIntErr- HeaderOF-
		AERCap:	First Error Pointer: 1f, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
			MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
		HeaderLog: 00000000 00000000 00000000 00000000

Full logs (lspci -vvnn of all devices, full dmesg, per-boot kernel logs) are available on request.

Additional context
  • Upstream commit: 72780f796468, Fixes: a89c82249c37, Cc: stable # v6.5+. First appears in v6.12.96 and v6.18.39.
  • Workaround: holding linux-image-6.12.75+rpt-rpi-2712. 6.12.96+ is not a safe fallback for affected users.
  • Anyone with a PCIe switch HAT whose port shows retraining non-functional downstream link at 2.5GT/s on an older kernel is likely affected by this on current kernels.
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