Recompiler: BC0T/BC0TL are never taken and BC0FL/BC0TL run their delay slot unconditionally

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Since Oct 23, 2026.

  • #390 by @ahmedgamalalzatary — open

Assessment

Difficulty
3/5
Estimated time
1-2 days
Newbie friendliness
72/100
Issue type
Bug
Clarity
Clearly specified
Activity status
Active
Tech stack
cpp
Domain
compilers, reverse-engineering

Research direction

Read ps2xRecomp/src/lib/control_flow_emitter.cpp, especially ControlFlowEmitter::conditionalBranchExpression() and isLikelyBranch(), then inspect the COP0 handling in cop0_translator.cpp. Add or locate the code-generator test covering BC0F, BC0T, BC0FL, and BC0TL with a non-NOP delay slot. The change is complete when COP0 branch conditions use the intended CPCOND0 behavior and likely branches nullify delay slots when not taken.

Written by the indexing model from the issue text.

Description

What happens

The EE branch-on-COP0-condition instructions (BC0F, BC0T, BC0FL, BC0TL) branch on CPCOND0, which the DMAC drives. The recompiler has no COP0 case for them:

  1. The condition is always false. ControlFlowEmitter::conditionalBranchExpression() (ps2xRecomp/src/lib/control_flow_emitter.cpp) handles OPCODE_COP1 and OPCODE_COP2 branch conditions, but not OPCODE_COP0, so it returns "false" for every BC0 form. BC0F and BC0T are therefore both never taken, although one of them must be taken for any value of CPCOND0.
  2. The likely forms aren't recognized as likely. ControlFlowEmitter::isLikelyBranch() lists COP1 and COP2 BCxFL/BCxTL, but not COP0_BC_BCFL/COP0_BC_BCTL. Their delay slot is emitted unconditionally, but a not-taken likely branch must nullify it.

cop0_translator.cpp says // BC0 ... - Handled by branch logic, but the branch logic doesn't handle it.

Effect

BC0F never taken matches "DMA already complete", which suits the runtime's eager DMA, so 1: bc0f 1b wait loops exit right away. But BC0T/BC0TL then go the wrong way, and BC0FL/BC0TL execute a delay-slot instruction the hardware would skip.

Hardware reference

CPCOND0 is true when every DMA channel selected in D_PCR.CPC has its D_STAT.CIS bit set. PCSX2 computes it as ((D_STAT.CIS | ~D_PCR.CPC) & 0x3FF) == 0x3FF, and BC0F branches when it's false.

Suggested fix

  • Treat CPCOND0 as true: BC0F/BC0FL never taken (current behavior), BC0T/BC0TL always taken. That matches the eager DMA model and can't turn a bc0f wait loop into a hang.
  • Add COP0_BC_BCFL/COP0_BC_BCTL to isLikelyBranch().

A more exact alternative is to compute CPCOND0 from D_STAT/D_PCR at run time. But some DMA paths in the runtime can stall (VIF1/PATH3), so a bc0f wait loop could spin forever if a CIS bit isn't set when expected. The constant is the safer first step.

Repro

A code-generator test with a BC0x branch + non-NOP delay slot + target shows const bool branch_taken_... = (false); for all four forms, and the delay slot emitted before the taken check for BC0FL/BC0TL.

Found while reviewing COP0 coverage for #163. Tested on main e563698.

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