Issues
Open
SystemVerilog-style slices of arbitrary base
Language Designenhancementgood first issue
No assignee yetHas a beginner-friendly labelContributing guide available
2 comments0 reactions0 assignees
Open
Default interface should have no name, instead of copying "Constructor convention"
Language Designenhancementgood first issue
Why recommendedNo assignee yet · No comments yet
No assignee yetNo comments yetHas a beginner-friendly labelContributing guide available
0 comments0 reactions0 assignees
Open
On-save regenerating of Verilog/VHDL files
enhancementgood first issue
Why recommendedNo comments yet · Has a beginner-friendly label
No comments yetHas a beginner-friendly labelContributing guide available
0 comments0 reactions1 assignee
Open
Resource usage reporting on hover
enhancementgood first issue
Why recommendedNo assignee yet · No comments yet
No assignee yetNo comments yetHas a beginner-friendly labelContributing guide available
0 comments0 reactions0 assignees
Open
VHDL Backend
Systementwurfenhancementgood first issue
Why recommendedHas a beginner-friendly label · Contributing guide available
Has a beginner-friendly labelContributing guide available
6 comments0 reactions1 assignee
Open
Global constants should have "gen" on hover
buggood first issue
Why recommendedNo assignee yet · No comments yet
No assignee yetNo comments yetHas a beginner-friendly labelContributing guide available
0 comments0 reactions0 assignees
Open
Namespaces
good first issue
Why recommendedNo comments yet · Has a beginner-friendly label
No comments yetHas a beginner-friendly labelContributing guide available
0 comments0 reactions1 assignee
Open
List of "Guaranteed Optimizations" in SUS
Language Designgood first issue
Why recommendedNo assignee yet · Has a beginner-friendly label
No assignee yetHas a beginner-friendly labelContributing guide available
1 comment0 reactions0 assignees