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Crystal load capacitors undersized for XTAL1 (8 MHz, 18 pF C_L)

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Valutazione

Difficoltà
4/5
Tempo stimato
3-5 giorni
Idoneità per principianti
48/100
Tipo di issue
Bug
Chiarezza
Abbastanza chiara
Stato di attività
Tranquilla
Ambito
embedded-iot

Direzione di ricerca

Review the schematic, BOM, and crystal-trace layout for XTAL1, C_X1/C_X2, and IC1 (ATmega1284P) to verify the capacitor values and estimate stray capacitance. Check the crystal and MCU datasheets before deciding whether the recommended values suit this circuit. Done means the load-capacitance concern and any value change are verified against the design; no specific file or test is named in the issue.

Scritto dal modello di indicizzazione a partire dal testo della issue.

Descrizione

bug

Summary

XTAL1 is an 8 MHz quartz crystal in a 5×3.2 mm package. The device is rated for 18 pF load capacitance (C_L). The load capacitors placed on XTAL1 and XTAL2 (connected to IC1 pins 8–7) appear to be 12 pF each, which is too small by roughly 50%.

How crystal load capacitance works

The two shunt capacitors (C_X1, C_X2) plus parasitic board capacitance set the effective load seen by the crystal:

C_eff = (C_X1 × C_X2) / (C_X1 + C_X2) + C_stray

For matched capacitors (C_X1 = C_X2 = C):

C_eff = C/2 + C_stray

Typical stray capacitance on a 2-layer board with a short trace is ~2–4 pF.

With 12 pF placed:

C_eff = 12/2 + 3 = 9 pF  (far below the required 18 pF)

To hit 18 pF effective load:

18 = C/2 + 3  →  C = 30 pF

Standard value: 27 pF (gives C_eff ≈ 16.5 pF, conservative but within tolerance) or 33 pF (gives ~19.5 pF, slightly over but acceptable).

Consequences of incorrect load capacitance

  • Crystal oscillates at a frequency offset from its marked value (can be tens to hundreds of ppm off)
  • Oscillation may be marginal at low supply voltage or temperature extremes
  • Can cause startup failures at cold temperatures or after sleep

For a data logger application where timestamps are critical, frequency accuracy directly impacts time-keeping quality.

Affected components

  • XTAL1: 8 MHz crystal, 5×3.2 mm, 18 pF C_L
  • C_X1, C_X2: load capacitors (verify exact designators and current values in BOM)
  • IC1: ATmega1284P, pins XTAL1 and XTAL2

Recommended fix

Replace the 12 pF load caps with 27 pF (if board stray is ~2 pF) or 33 pF (if stray is ~4 pF). Verify stray capacitance estimate with a layout review of the crystal traces. Shorter traces are strongly preferred — crystal load cap traces should be <5 mm.

Note: IC1 also uses the DS3231M RTC (U7?) for timekeeping, which has its own integrated 32.768 kHz crystal and is temperature-compensated. The 8 MHz system clock is for MCU operation, not timekeeping, so frequency offset has limited practical impact — but marginal startup at cold temperatures is still a real risk worth addressing.

🤖 Generated with Claude Code

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