dcd_dwc2: reproduce the GINTMSK/DAINTMSK races fixed by #4115 on dual-core ESP32-S3/P4
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Assessment
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Newbie friendliness
- 35/100
- Issue type
- Bug
- Clarity
- Mostly clear
- Activity status
- Active
- Tech stack
- c
- Domain
- embedded-iot, testing-qa
Research direction
Start by reviewing #4115 and the stated interleavings, then set up dual-core ESP32-S3 and ESP32-P4 slave-mode HIL with USB IRQ and application work on different cores. Build a targeted stress firmware for the listed CDC/audio traffic and toggles; keep #4013's DIEPEMPMSK fix in both test builds. Done means reproducing the failure on b05fb182d, showing it gone on e42fa9357 or later, and recording mask values on failure.
Written by the indexing model from the issue text.
Description
Follow-up from #4115 (closes #4105): the GINTMSK/DAINTMSK races it fixes were found by code review and never reproduced on hardware. HIL on master e42fa9357 shows no regression (usbtest 30/30 on all dwc2 rows incl. espressif_s3_devkitm/espressif_p4_function_ev, slave and DMA), but HIL runs ordinary traffic, not the interleavings.
Interleavings to provoke (multi-core only)
- RX masked: task
dcd_sof_enable()RMW while the ISR on the other core hasRXFLVLMcleared during the RX drain → OUT traffic stops (slave mode). - SOF lost: ISR reads
sof_en == falseor snapshotsGINTMSKwhile the task enables SOF →SOFMcleared withsof_en == true, SOF callbacks/audio feedback stop.
Remaining work
- Stress on ESP32-S3 and ESP32-P4 (slave), USB IRQ and application on different cores: sustained bidirectional CDC plus audio with feedback, toggling the audio alternate setting /
tud_sof_cb_enable()in a loop, plus suspend/resume and reset. - Run it on a pre-#4115 build (
b05fb182d) to show the failure, then one42fa9357or later to show it gone; record mask values on failure. - Keep #4013's DIEPEMPMSK fix in both builds so that failure does not confound the result.
Why deferred
#4115 merged on source analysis plus regression HIL; a targeted reproduction needs a purpose-built stress firmware and bench time.
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