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V80 SLASH shell silently drops host `s_axi_control` writes to offsets `0x40–0xBF`

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#226 5 comments 0 reactions 1 assignee View on GitHub

@quetric is already working on this.

Since Sep 24, 2026.

Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
45/100
Issue type
Bug
Clarity
Clearly specified
Activity status
Active
Tech stack
c, cpp

Research direction

The bug is in the V80 SLASH shell's s_axi_control interface handling. Start by examining the shell's RTL code for address decoding logic, focusing on the first 256 bytes of the control aperture. Look at how address bits [7:6] are processed. The workaround mentions widening C_S_AXI_ADDR_WIDTH from 8 to 12 and remapping registers to 0x100–0xFFF; understand this modification. Verify with JTAG/ILA probes to confirm the fix. Done when host writes to offsets 0x40–0xBF correctly reach the kernel.

Written by the indexing model from the issue text.

Description

V80 SLASH shell silently drops host s_axi_control writes to offsets 0x40–0xBF (i.e. when addr[7]≠addr[6])

1. Environment

  1. Git dev branch commit 7a528701c3f17506e5c645399b8b57c82d39632f
  2. Tools: Vivado/Vitis 2025.1 · SLASH VRT

2. Bug description

Host control-register accesses (VRT kernel.read()/write() over QDMA/PCIe) to a kernel's
s_axi_control interface are not delivered to the kernel for register offsets in the first 256
bytes
of the control aperture whose address bit [7] ≠ bit [6] — i.e. 0x40–0x7F and 0x80–0xBF.
Observed behavior on these offsets: a host write does not update the kernel register (confirmed by
JTAG accesses and ILA probes on s_axi_control), yet a host read of the same offset returns the value
the host last wrote there — so the write-then-readback self-validates and the failure is invisible/masked.
Kernel argument pointers written to affected offsets stay 0, producing wrong results with no error
reported.

Addresses checked (V80 compute shell, 4 KB control aperture at 0x20200000000):

aperture offset A[7:6] result
0x00–0x3F 00 reaches kernel ✅
0x40–0x7F 01 does not reach kernel ❌
0x80–0xBF 10 does not reach kernel ❌
0xC0–0xFF 11 reaches kernel ✅
0x100–0xFFF any reaches kernel ✅

3. Temporary Workaround (kernel-side) which works for TAPA design

The failing 0x40–0xBF registers were re-mapped into 0x100–0xFFF (a region that does reach the kernel), and C_S_AXI_ADDR_WIDTH was widened 8 → 12 to make those offsets addressable. (As the good 0x00–0x3F and 0xC0–0xFF sub-bands were not large enough).

Dominant language
Tcl
Stars
48
Forks
23
Avg merge
1d 1h
Merged PRs (30d)
5

Getting set up

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

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