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feat: host conversions for the narrow float storage types

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Assessment

Difficulty
4/5
Estimated time
3-5 days
Newbie friendliness
25/100
Issue type
Feature
Clarity
Clearly specified
Activity status
Active
Tech stack
rust
Domain
backend

Research direction

Read the "Transplanting a cutile-rs pull request" section in AGENTS.md first; the issue identifies the closed NVlabs/cutile-rs pull/201 as the implementation reference and says the repository has moved to NVIDIA/cuda-rust. Recreate the work against this repository, preserving authorship and sign-off through the documented replay. Done means the host conversions and validation described in the original summary are present here; coordinate with the maintainer if the transplant instructions do not cover a step.

Written by the indexing model from the issue text.

Description

cutile-rs post-migration-pr

Tracks pull request NVlabs/cutile-rs#201 (https://github.com/NVlabs/cutile-rs/pull/201) by @honeyspoon, opened 2026-07-31: feat: host conversions for the narrow float storage types. The branch was rebased onto cutile-rs main on 2026-10-07 and merges cleanly.

@honeyspoon: that repository has moved here and is being archived, so the pull request is closed there, not rejected. If you want to continue the work, please recreate it against NVIDIA/cuda-rust. AGENTS.md in NVIDIA/cuda-rust has a "Transplanting a cutile-rs pull request" section that lets an agent do the replay (it fetches pull/201/head from NVlabs/cutile-rs, keeps your authorship and sign-off, and maps the moved paths).

Original description:

Summary

Add host-side conversions for the narrow floating-point storage types in
cuda-core:

  • f8e4m3fn, f8e5m2, and f4e2m1fn: lossless widening to f32 and
    round-to-nearest-even narrowing from f32.
  • f8e8m0fnu: lossless widening, exponent inspection, and selection of the
    smallest power-of-two scale that covers a magnitude.
  • Lossless From<narrow> for f32 implementations, matching the convention
    used by the half crate.

These types already flow through DTypeId and Tile IR, but previously callers
had to implement their own host encoding when preparing quantized tensors or
checking kernel output.

Conversion behavior

The scalar conversions match CUDA 13.3 host intrinsics:

Format Overflow NaN input
E4M3FN Saturates to +/-448 Canonical 0x7F
E5M2 Converts to +/-infinity Canonical 0x7F
E2M1FN Saturates to +/-6 Positive max, 0x07

Finite values use round-to-nearest, ties-to-even. Signed zero and gradual
underflow are preserved where the destination format supports them.

E8M0 is handled separately because it represents an unsigned power-of-two
scale rather than a signed floating-point value. scale_covering rounds toward
positive infinity so that scaling a block cannot make its largest element
overflow solely because the scale was rounded down. Exact powers of two remain
exact. Values outside the finite E8M0 range clamp to 2^-127 or 2^127; NaN
maps to the reserved 0xFF encoding.

Implementation

E4M3FN, E5M2, and E2M1FN share a private format descriptor and one encode/decode
implementation. The public API remains inherent methods rather than adding a
new public trait:

fn to_f32(self) -> f32;
fn from_f32(value: f32) -> Self;

// f8e8m0fnu
fn exponent(self) -> Option<i32>;
fn scale_covering(magnitude: f32) -> Self;

The conversion path is dependency-free and marked for inlining so scalar calls
can be optimized inside host quantization loops.

Validation

  • Exhaustive decode/encode round trips for every finite E4M3FN, E5M2, and
    E2M1FN bit pattern.
  • Exhaustive decode checks for all 255 non-NaN E8M0 encodings.
  • Every finite rounding boundary, including ties, subnormal transitions, and
    E5M2 overflow.
  • E8M0 coverage, minimality, and monotonicity across every f32 exponent class
    and representative mantissa boundaries.
  • Signed zeros, infinities, smallest/largest subnormals, and positive/negative
    signaling and quiet NaNs with minimal and maximal payloads.
  • Byte-for-byte comparison against CUDA 13.3 conversions for every narrow
    decode pattern, the special-value corpus above, and 1,000,000 deterministic
    f32 inputs.
  • cargo fmt, scoped Clippy with warnings denied, rustdoc with warnings denied,
    Rust 1.89 MSRV, Miri, the complete CPU test suite, and workspace compilation.

Scope

This PR only adds scalar host conversions. Packed FP4 slice conversion and
block-wise MX/NVFP4 quantization require separate layout and API decisions and
are intentionally left for follow-up work.

Dominant language
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Stars
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Avg merge
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Merged PRs (30d)
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