llvm/llvm-project

[X86] Missed Optimization: Vector 8-bit `rotl(x, 1)` should be lowered as `(x + x) - (x < 0)`

Closed

#198,059 opened on May 16, 2026

View on GitHubContributor guide
 (12 comments) (0 reactions) (1 assignee)C++ (10,782 forks)batch import
backend:X86good first issuemissed-optimization

Repository metrics

Stars
 (26,378 stars)
PR merge metrics
 (Avg merge 1d 2h) (1,000 merged PRs in 30d)

Description

Due to a lack of support, most 8-bit shifts are implemented using a 16-bit shift + AND:

rotl1_src:
        movdqa  xmm1, xmm0
        paddb   xmm1, xmm0
        psrlw   xmm0, 7
        pand    xmm0, xmmword ptr [rip + .LCPI2_0]
        por     xmm0, xmm1
        ret

The OR and right shift can be replaced with a subtraction by a less-than-zero mask, which acts like a conditional disjoint add by 1. This shortens the dependency chain and avoids the shift, which has worse throughput on some architectures.

rotl1_tgt:
        pxor    xmm1, xmm1
        pcmpgtb xmm1, xmm0
        paddb   xmm0, xmm0
        psubb   xmm0, xmm1
        ret

https://godbolt.org/z/199KoWhs8

Contributor guide

Research direction
Examine the x86 backend in LLVM's SelectionDAG or X86InstrInfo for the lowering of 8 bit rotate left by 1. Identify where the current code generates a shift and OR, and modify it to produce a subtraction using a comparison with zero mask.
Tech stack
cpp
Domain
backend
Issue type
Bug
DifficultyEstimated implementation difficulty for a new contributor, from 1 for very small changes to 5 for expert-level work.
3
Estimated timeA rough time range for an experienced contributor to investigate, implement, test, and prepare a pull request.
Half day
Activity statusHow available the issue appears right now: fresh, active, stale, blocked, or waiting on maintainer input.
Active
ClarityHow clearly the issue explains the expected change, acceptance criteria, and next step.
Clear
Prerequisites
cpp
Newbie friendlinessA 1-100 score estimating how approachable this issue is for first-time contributors.
60