llvm/llvm-project
GitHub で見る[InstCombine] Missed optimization : fold `switch(rol(a, c))`
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#86,161 opened on 2024年3月21日
good first issuellvm:instcombinemissed-optimization
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説明
Alive2 proof: https://alive2.llvm.org/ce/z/uPJXhH
Motivating example
define i64 @src(i64 %a) #0 {
entry:
%rol = call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 62)
switch i64 %rol, label %default [
i64 0, label %trap.exit
i64 5, label %trap.exit
]
default:
call void @dummy()
br label %trap.exit
trap.exit:
ret i64 0
}
can be folded to:
define i64 @tgt(i64 %a) #0 {
entry:
switch i64 %a, label %default [
i64 0, label %trap.exit
i64 20, label %trap.exit
]
default:
call void @dummy()
br label %trap.exit
trap.exit:
ret i64 0
}
Real-world motivation
This snippet of IR is derived from ruby/signal.c@sig_trap (after O3 pipeline). The example above is a reduced version. If you're interested in the original suboptimal IR and optimal IR, see also:https://godbolt.org/z/E7nz88vbP
Let me know if you can confirm that it's an optimization opportunity, thanks.