good first issuellvm:vectorcombine
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Beschreibung
Clang Godbolt (Zigv0.16 Godbolt)
define <2 x i64> @foo(<2 x i64> %0) unnamed_addr align 4 {
Entry:
%1 = tail call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %0)
%2 = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %1)
ret <2 x i64> %2
}
declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) #1
=>
define <2 x i64> @bar(<2 x i64> %0) unnamed_addr align 4 {
Entry:
%1 = bitcast <2 x i64> %0 to <16 x i8>
%2 = tail call <16 x i8> @llvm.bitreverse.v16i8(<16 x i8> %1)
%3 = bitcast <16 x i8> %2 to <2 x i64>
ret <2 x i64> %3
}
declare <16 x i8> @llvm.bitreverse.v16i8(<16 x i8>) #1
Fixes an issue on aarch64:
foo:
- rev64 v0.16b, v0.16b
- rev64 v0.16b, v0.16b
rbit v0.16b, v0.16b
ret