Issues with portSET_INTERRUPT_MASK_FROM_ISR for cortex R5

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Assessment

Difficulty
1/5
Estimated time
Under an hour
Newbie friendliness
52/100
Issue type
Bug
Clarity
Clearly specified
Activity status
Stale
Tech stack
cmake
Domain
embedded-iot

Research direction

Start in ThirdParty/bsp/freertos10_xilinx/src/freertos10_xilinx.cmake around line 464 and inspect how the Cortex R5 interrupt-mask definition is configured. Confirm the Cortex R5 configuration includes portSET_INTERRUPT_MASK_FROM_ISR and verify the generated FreeRTOS setup uses that definition.

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Description

After updating our application for CortexR5 to SDT workflow with 2025.2 we experienced issues with FreeRTOS. It turned out that interrupt mask from ISR (portSET_INTERRUPT_MASK_FROM_ISR) is not properly defined for CortexR5:

https://github.com/Xilinx/embeddedsw/blob/1bb19ac1ab06ab322ba4340bed372f93ca612a18/ThirdParty/bsp/freertos10_xilinx/src/freertos10_xilinx.cmake#L464

Issue could be fixed by adding this to freertos10_xilinx.cmake for CortexR5:

set(SET_INT_MASK_FROM_ISR "#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()")
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