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SeedVGP/DLPR32
RISC V 32 bit with GRU enable Processor design
Verilog
Stars 4
Forks 2
Watchers 4
Open issues 3
License GNU General Public License v3.0
Details
仓库信息
Owner
SeedVGP
Homepage
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GitHub
https://github.com/SeedVGP/DLPR32
Last pushed
2022-07-18
Last updated
2025-12-13
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